A CPU that can allow for multiple cycles per operation. Each instruction should be broken down into 3-5 Micro-Operations:
- IF (Instruction Fetch)
- ID (Instruction Decode)
- Ex (Execute)
- MEM (Memory)
- WB (Write Back)
Often multicycle CPUs are Pipelined
A CPU that can allow for multiple cycles per operation. Each instruction should be broken down into 3-5 Micro-Operations:
Often multicycle CPUs are Pipelined